A Comprehensive Study on Low-Power Compressor Architectures for High-Speed Digital Arithmetic Circuits. International journal of electronics and communications, [S. l.], v. 6, n. 01, p. 1–5, 2026. DOI: 10.55640/. Disponível em: https://www.academicpublishers.org/journals/index.php/ijec/article/view/9590.. Acesso em: 22 jan. 2026.