Design-for-Test (DFT) strategies for high-performance computing and graphics chips. International journal of signal processing, embedded systems and VLSI design, [S. l.], v. 5, n. 01, p. 10–34, 2025. DOI: 10.55640/ijvsli-05-01-03. Disponível em: https://www.academicpublishers.org/journals/index.php/ijvsli/article/view/4306.. Acesso em: 12 nov. 2025.