MAXIMIZING EFFICIENCY: MULTIPLIER OPTIMIZATION FOR ASIC IMPLEMENTATIONS. International journal of signal processing, embedded systems and VLSI design, [S. l.], v. 3, n. 01, p. 1–7, 2023. Disponível em: https://www.academicpublishers.org/journals/index.php/ijvsli/article/view/108.. Acesso em: 12 nov. 2025.